SCALINX and Arteris Team up on Advanced Communications Innovation By CIOTechOutlook Team

SCALINX and Arteris Team up on Advanced Communications Innovation

CIOTechOutlook Team | Wednesday, 13 December 2023, 06:11 IST

SCALINX, a fabless semiconductor company specializing in mixed-signal SoC design, has licensed Ncore and FlexNoC interconnect IP for its next-generation Modem SoC dedicated to wireless communication infrastructures, according to Arteris, Inc, a leading provider of system IP that accelerates system-on-chip (SoC) creation. Arteris interconnect IP devices enable more efficiency, lower costs, and faster time to market in the 5G communications sector.

SCALINX’s data-conversion SCCORETM technology enables the design of highly integrated mixed-signal SoCs capable of processing wideband and multi-carrier signals with outstanding energy efficiency. SCALINX’s new Modem SoC will provide telecom players with the power to deliver ultra-high capacity, multi-gigabit links over longer distances at an optimized total cost of ownership for microwave, millimeter-wave and multi-band equipment, as per Verizon.

“We are excited to partner with Arteris to accelerate the creation and delivery of an advanced communication SoC,” said Hussein Fakhoury, CEO of SCALINX. “Now, we can focus our resources where we bring the most value. Our company will leverage Arteris’ proven Ncore and FlexNoC technology and interconnect expertise for a combination that allows us to provide our customers with the best products in the shortest amount of time.”

“Our silicon-proven IP technology facilitates the design of multi-band, multi-carrier SoCs to meet the demands of this ambitious project,” said K. Charles Janac, president and CEO of Arteris. “The potential for the SCALINX technology is extensive, and it could have a significant impact on the future of communications.”

For higher performance, Arteris Ncore cache coherent network-on-chip connective IP enables scalability, low latency, and power-efficient connectivity. Furthermore, FlexNoC physically aware network-on-chip connective IP shortens the time to market by lowering the number of iterations, allowing design teams to meet power, performance, and area targets on time and on budget.